IP cores for custom silicon designs, with unbelievable latency, size & flexibility.
Lowest Latency, Power and Size
Lowest power and cost for your ASIC or FPGA designs
Welcome to Tamba Networks, a developer of Low-Latency Networking Solutions for ASICs, ASSPs, and FPGAs. Tamba is revolutionizing the design of next generation communications equipment with its Intellectual Property (IP) Cores.
Tamba offers the industry’s lowest latency, power, and size solution for ethernet MAC & PCS cores, 1Gbps, 10Gbps, 40Gbps, 100Gbps, 200Gbps, 400Gbps in FPGA and ASIC. The extensively pipe-lined architecture can be tuned to the underlying silicon fabric so targeting different FPGA’s or different ASIC process nodes is incredibly simple with drastic reductions in latency, power consumption, and logic size.
Tamba offers the industry’s lowest latency, power, and size solution for the Interlaken communication protocol. The Universal Interlaken IP Core can be customized from 1 Gbps to 600 Gbps and targeted to both FPGA and ASIC platforms with great flexibility for lane count and serdes speeds, with amazing performance in latency, power consumption, and logic size.
Petaluma, CA Headquarters
Tamba Networks, LLC
129 Ravenswood Crt.
Petaluma, CA 94952
Phone: (650) 469-3891
October 22nd 2014:Tamba Releases New Ultra-Low Latency Ethernet Cores for Xilinx UltraScale™ 20nm FPGA - Lowest Latency Achieved on an FPGA Device.
April 7th 2014: Tamba Networks Partners with BittWare to Provide Ethernet MAC+PCS IP Cores. 10/40 GigE MAC+PCS cores enable an unprecedented wire-to-application latency for financial applications on Altera Stratix V-based hardware.
July 2013: Tamba Networks successfully demonstrates Interlaken inter-operation with Broadcom's NLA12000 device families. The IP core is fully compliant to the Interlaken Protocol Definition revision 1.2
February 2013: Tamba launches universal, low latency ethernet MAC. Ideally suited to financial or networking applications requiring ultra low latency.